Fast Ethernet links generally consist of a
connection between a station and a hub or switch. Hubs are considered
multi-port repeaters and switches are considered multi-port bridges.
These are subject to the 100 m UTP media distance limitation.
A Class I repeater may introduce up to
140 bit-times of latency. Any repeater that changes between one
Ethernet implementation and another is a Class I repeater. A Class II
repeater may only introduce a maximum of 92 bit-times latency. Because
of the reduced latency it is possible to have two Class II repeaters
in series, but only if the cable between them is very short.
As with 10 Mbps versions, it is
possible to modify some of the architecture rules for 100 Mbps
versions. However there is virtually no allowance for additional
delay. Modification of the architecture rules is strongly discouraged
for 100BASE-TX. 100BASE-TX cable between Class II repeaters may not
exceed 5 meters. Links operating in half duplex are not uncommon to
find in Fast Ethernet. However, half duplex is undesirable because the
signaling scheme is inherently full duplex.
Figure
shows
architecture configuration cable distances. 100BASE-TX links can have
unrepeated distances up to 100 m. The widespread introduction of
switches has made this distance limitation less important. If
workstations are located within 100 m of a switch, the 100 m distance
starts over at the switch. Since most Fast Ethernet is switched, these
are the practical limits between devices.
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Lab Activity
Lab Exercise: Introduction to Fluke Network Inspector
This lab is a tutorial demonstrating how to use the Fluke
Networks Network Inspector (NI) to discover
and analyze network devices within a broadcast domain.
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Lab Activity
Lab Exercise: Introduction to Fluke Protocol Inspector
This lab is a tutorial demonstrating how to use the Fluke
Networks Protocol Inspector to analyze
network traffic and data frames.
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Interactive Media Activity
Drag and Drop: Fast Ethernet Architecture
After completing this activity, the student will
understand the architecture of Fast Ethernet.
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